diff --git a/find_stale_pdf.bash b/find_stale_pdf.bash
deleted file mode 100755
index d770293..0000000
--- a/find_stale_pdf.bash
+++ /dev/null
@@ -1,28 +0,0 @@
-#!/bin/bash
-file_list=`find . -print | grep -i ".md"`
-
-for element in $file_list
-do
-	dir=`dirname ${element}`
-	cd $dir
-	md_name=`basename ${element} .md`
-    pdf_name=${md_name}.pdf
-    md_name=${md_name}.md
-    if [ ! -f $pdf_name ]
-    then
-        echo Generating missing PDF file in $dir for $md_name
-        pandoc $md_name -o $pdf_name
-        cd - > /dev/null
-        continue
-    fi
-    md_date=`date -r ${md_name} +%s`
-    pdf_date=`date -r ${pdf_name} +%s`
-    if [ $pdf_date -lt $md_date ];
-    then
-        #echo Is $pdf_date greater than $md_date 
-        echo Freshening $pdf_name in $dir
-        pandoc $md_name -o $pdf_name
-    fi 
-	cd - > /dev/null
-done
-
diff --git a/section_1/regs/ldr.md b/section_1/regs/ldr.md
index f0a503d..bcb6794 100644
--- a/section_1/regs/ldr.md
+++ b/section_1/regs/ldr.md
@@ -104,10 +104,12 @@ often used when executing SIMD instructions.
 
 SIMD is *Single Instruction - Multiple Data*. For example, 4 single
 precision floats might be multiplied by a scalar in a single
-instruction.
+instruction. The SIMD instruction set that is / will be covered in this
+book is called NEON.
 
-The AARCH64 ISA includes an even more exotic means of performing
-mass calculation which we might describe (some day).
+The AARCH64 ISA includes an even more exotic means of performing mass
+calculation called SVE. We will probably never cover AVE as no generally
+available processor implements it. This includes Apple Silicon.
 
 ## Examples
 
diff --git a/section_1/regs/ldr.pdf b/section_1/regs/ldr.pdf
index f5e83f2..5783d5d 100644
Binary files a/section_1/regs/ldr.pdf and b/section_1/regs/ldr.pdf differ
diff --git a/section_2/float/README.md b/section_2/float/README.md
index 1657216..15abc94 100644
--- a/section_2/float/README.md
+++ b/section_2/float/README.md
@@ -71,7 +71,8 @@ The first kind is NEON.
 [This is described here.](./../../not_written_yet.md)
 
 The second kind of Scalable Vector Extension (SVE) for which we do not
-have near-term plans to cover.
+have near-term plans to cover. SVE is not implemented on any generally
+available ARM processor including Apple Silicon.
 
 ## Demo Programs in this Chapter
 
diff --git a/section_2/float/README.pdf b/section_2/float/README.pdf
index eae62e9..7e5f1b0 100644
Binary files a/section_2/float/README.pdf and b/section_2/float/README.pdf differ
diff --git a/section_2/float/fmov.md b/section_2/float/fmov.md
index 3fc3296..0028533 100644
--- a/section_2/float/fmov.md
+++ b/section_2/float/fmov.md
@@ -64,7 +64,7 @@ covered [in this chapter](./literals.md).
 ## SIMD
 
 `fmov` can also deal with the more complicated special cases induced by
-SIMD instruction.
+SIMD instructions.
 
 ## Movement To / From Integer Registers
 
diff --git a/section_2/float/fmov.pdf b/section_2/float/fmov.pdf
index 39c926b..20d5dee 100644
Binary files a/section_2/float/fmov.pdf and b/section_2/float/fmov.pdf differ