From 4c66af132d4c18b626e1c9f6d8b74fccc4bd3e32 Mon Sep 17 00:00:00 2001
From: pkivolowitz <perry@kivolowitz.com>
Date: Tue, 13 Feb 2024 13:27:46 -0600
Subject: [PATCH] Update working.md

the float registers show are for 32 bit arm - must be fixed.
---
 section_2/float/working.md | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/section_2/float/working.md b/section_2/float/working.md
index d95e5c6..b2d18dc 100644
--- a/section_2/float/working.md
+++ b/section_2/float/working.md
@@ -29,6 +29,9 @@ For example, in the following image, note the overlap of two single
 precision floats within a single double precision floating point
 register.
 
+*NOTE NOTE NOTE* This must be fixed - the picture corresponds to the
+32 bit state - AARCH32![v](url)
+
 ![regs](./regs.png)
 
 It is worth noting early and often that you should not mix dealing