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Perry Kivolowitz 2022-07-21 11:08:48 -05:00
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@ -69,10 +69,9 @@ the 64 bit ARM Instruction Set Architecture (ISA).
| .... b | [.... Registers (simplified)](./section_1/float/working.md) | .... b | [.... Registers (simplified)](./section_1/float/working.md)
| .... c | [.... Literals](./section_1/float/literals.md) | .... c | [.... Literals](./section_1/float/literals.md)
| .... d | [.... `fmov`](./section_1/float/) | .... d | [.... `fmov`](./section_1/float/)
| .... e | [.... Conversion To / From Integers](./section_1/float/) | .... e | [.... Conversion To / From Integers](./section_1/float/rounding.md)
| .... f | [.... Rounding](./section_1/float/) | .... f | [.... Four Basic Operations](./section_1/float/)
| .... g | [.... Four Basic Operations](./section_1/float/) | .... g | [.... Selected Additional Operations](./section_1/float/)
| .... h | [.... Selected Additional Operations](./section_1/float/)
| .... z | [.... Half Precision Floats](./section_1/float/half.md) | .... z | [.... Half Precision Floats](./section_1/float/half.md)
## Section 2 - Bit Manipulation ## Section 2 - Bit Manipulation