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the sample assembly programs here have been converged
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Perry Kivolowitz
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89
section_2/float/README.md
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89
section_2/float/README.md
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# Section 2 / Floating Point
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This chapter deals exclusively with the handling of floating point
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operations on the AARCH64 platform.
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## What are Floating Point Numbers?
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Let's first begin with an understanding of what floating point numbers
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are. [That can be found here](./what.md).
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The TL;DR is that floating point numbers are approximations with double
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precision being better approximations that single precision.
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Floating point numbers have a sign bit (for signed floating points), an
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exponent which controls the range of representable numbers, and a
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mantissa that controls precision.
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## Floating Point Registers
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There are 31 general registers (the X and W registers). Similarly there
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are 31 floating point registers which are reused for single, double and
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vector (SIMD - Single Instruction Multiple Data) instructions.
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A bit more detail [is provided here](./working.md).
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## Rounding and Truncation
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Truncation is part of casting `float` and `double` to `int` and `long`.
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Rounding is important too.
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[Coverage on rounding and truncation is found here](./rounding.md).
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## Loading Floating Point Numbers into Registers
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This is a little confusing because some values can be loaded from
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arguments in the `fmov` instruction. For example, 1.0 can be `fmov`ed.
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Trying to do the same for 1.1 will fail. Remember that AARCH64
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instructions are always 32 bits wide and that floating point numbers are
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at least that size.
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[This chapter](./literals.md) covers the loading of floating numbers
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into registers. A sample program is linked below.
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## Nuances of `fmov`
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As indicated above, you can `fmov` a floating point literal into a
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register. Except when you can't. Well, mostly you can't.
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Additionally, there are some rules about using `fmov` between registers.
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[This chapter](../../not_written_yet.md) covers the nuances of using
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`fmov`.
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## Half Precision Floating Point Numbers
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Often used in Computer Graphics, half precision floats fit within 16
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bits, the size of a `short`.
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The TL;DR here is: Avoid them.
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[This chapter explains why](./half.md).
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## SIMD
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There are two types of SIMD instruction sets available in the AARCH64
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ISA but the makers of processors are not obligated to implement them on
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any particular chip.
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The first kind is NEON.
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[This is described here.](./../../not_written_yet.md)
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The second kind of Scalable Vector Extension (SVE) for which we do not
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have near-term plans to cover.
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## Demo Programs in this Chapter
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In case you want to get right to the code, here are the demos presented
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in this chapter.
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If you receive the assembly language files with a lower case extension,
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you will need to make the `.s` extension into `.S`.
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| Link | Contents | Converged |
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| ---- | -------- | --------- |
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| [Link](./float_dump.cpp) | Deconstructs floating point values | NA |
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| [Link](./asm_rounding.S) | Demonstrates some rounding in asm | Yes |
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| [Link](./rounding.cpp) | Demonstrates some rounding in C++ | NA |
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| [Link](./literals.S) | Demonstrates dealing with floating point literals | Yes |
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116
section_2/float/apple-linux-convergence.S
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section_2/float/apple-linux-convergence.S
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/* Macros to permit the "same" assembly language to build on ARM64
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Linux systems as well as Apple Silicon systems.
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See the fuller documentation at:
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https://github.com/pkivolowitz/asm_book/blob/main/macros/README.md
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Perry Kivolowitz
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A Gentle Introduction to Assembly Language
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*/
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.macro GLD_PTR xreg, label
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#if defined(__APPLE__)
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adrp \xreg, _\label@GOTPAGE
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ldr \xreg, [\xreg, _\label@GOTPAGEOFF]
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#else
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ldr \xreg, =\label
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ldr \xreg, [\xreg]
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#endif
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.endm
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.macro GLD_ADDR xreg, label // Get a global address
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#if defined(__APPLE__)
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adrp \xreg, _\label@GOTPAGE
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add \xreg, \xreg, _\label@GOTPAGEOFF
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#else
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ldr \xreg, =\label
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#endif
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.endm
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.macro LLD_ADDR xreg, label
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#if defined(__APPLE__)
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adrp \xreg, \label@PAGE
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add \xreg, \xreg, \label@PAGEOFF
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#else
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ldr \xreg, =\label
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#endif
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.endm
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.macro LLD_DBL xreg, dreg, label
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#if defined(__APPLE__)
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adrp \xreg, \label@PAGE
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add \xreg, \xreg, \label@PAGEOFF
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ldur \dreg, [\xreg]
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// fmov \dreg, \xreg
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#else
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ldr \xreg, =\label
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ldur \dreg, [\xreg]
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#endif
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.endm
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.macro LLD_FLT xreg, sreg, label
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#if defined(__APPLE__)
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adrp \xreg, \label@PAGE
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add \xreg, \xreg, \label@PAGEOFF
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ldur \sreg, [\xreg]
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#else
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ldr \xreg, =\label
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ldur \sreg, [\xreg]
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#endif
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.endm
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.macro GLABEL label
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#if defined(__APPLE__)
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.global _\label
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#else
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.global \label
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#endif
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.endm
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.macro MAIN
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#if defined(__APPLE__)
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_main:
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#else
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main:
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#endif
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.endm
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.macro CRT label
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#if defined(__APPLE__)
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bl _\label
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#else
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bl \label
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#endif
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.endm
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.macro START_PROC // after starting label
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.cfi_startproc
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.endm
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.macro END_PROC // after the return
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.cfi_endproc
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.endm
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.macro PUSH_P a, b
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stp \a, \b, [sp, -16]!
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.endm
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.macro PUSH_R a
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str \a, [sp, -16]!
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.endm
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.macro POP_P a, b
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ldp \a, \b, [sp], 16
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.endm
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.macro POP_R a
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ldr \a, [sp], 16
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.endm
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.macro MIN src_a, src_b, dest
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csel \dest, \src_a, \src_b, GT
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.endm
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.macro MAX src_a, src_b, dest
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csel \dest, \src_a, \src_b, LT
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.endm
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99
section_2/float/test.s
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99
section_2/float/test.s
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.section __TEXT,__text,regular,pure_instructions
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.build_version macos, 13, 0 sdk_version 13, 1
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.globl _main ; -- Begin function main
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.p2align 2
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_main: ; @main
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.cfi_startproc
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; %bb.0:
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sub sp, sp, #80
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stp x22, x21, [sp, #32] ; 16-byte Folded Spill
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stp x20, x19, [sp, #48] ; 16-byte Folded Spill
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stp x29, x30, [sp, #64] ; 16-byte Folded Spill
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add x29, sp, #64
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.cfi_def_cfa w29, 16
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.cfi_offset w30, -8
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.cfi_offset w29, -16
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.cfi_offset w19, -24
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.cfi_offset w20, -32
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.cfi_offset w21, -40
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.cfi_offset w22, -48
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Lloh0:
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adrp x20, _d@PAGE
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Lloh1:
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add x20, x20, _d@PAGEOFF
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ldr d0, [x20]
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Lloh2:
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adrp x21, _f@PAGE
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Lloh3:
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add x21, x21, _f@PAGEOFF
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ldr s1, [x21]
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fcvt d1, s1
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str d1, [sp, #16]
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str d0, [sp, #8]
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str xzr, [sp]
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Lloh4:
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adrp x19, l_.str@PAGE
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Lloh5:
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add x19, x19, l_.str@PAGEOFF
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mov x0, x19
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bl _printf
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ldr d0, [x20, #8]
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ldr s1, [x21, #4]
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fcvt d1, s1
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str d1, [sp, #16]
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str d0, [sp, #8]
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mov w8, #1
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str x8, [sp]
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mov x0, x19
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bl _printf
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ldr d0, [x20, #16]
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ldr s1, [x21, #8]
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fcvt d1, s1
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str d1, [sp, #16]
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str d0, [sp, #8]
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mov w8, #2
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str x8, [sp]
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mov x0, x19
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bl _printf
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ldr d0, [x20, #24]
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ldr s1, [x21, #12]
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fcvt d1, s1
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str d1, [sp, #16]
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str d0, [sp, #8]
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mov w8, #3
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str x8, [sp]
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mov x0, x19
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bl _printf
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mov w0, #0
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ldp x29, x30, [sp, #64] ; 16-byte Folded Reload
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ldp x20, x19, [sp, #48] ; 16-byte Folded Reload
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ldp x22, x21, [sp, #32] ; 16-byte Folded Reload
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add sp, sp, #80
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ret
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.loh AdrpAdd Lloh4, Lloh5
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.loh AdrpAdd Lloh2, Lloh3
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.loh AdrpAdd Lloh0, Lloh1
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.cfi_endproc
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; -- End function
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.section __DATA,__data
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.globl _d ; @d
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.p2align 3
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_d:
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.quad 0x3ff8e38da3c21188 ; double 1.555555
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.quad 0x40055554fbdad752 ; double 2.6666660000000002
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.quad 0x400e38e325d4a5df ; double 3.7777769999999999
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.quad 0x40138e38a7e73a36 ; double 4.8888879999999997
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.globl _f ; @f
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.p2align 2
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_f:
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.long 0x3f8e38e3 ; float 1.11111104
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.long 0x400e38e3 ; float 2.22222209
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.long 0x40555554 ; float 3.33333302
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.long 0x408e38e3 ; float 4.44444418
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.section __TEXT,__cstring,cstring_literals
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l_.str: ; @.str
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.asciz "index %ld double %f float %f\n"
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.subsections_via_symbols
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