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updated dmb
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3 changed files with 25 additions and 21 deletions
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@ -105,25 +105,24 @@ Bummer.
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Here is the source code to the spin-lock for ARM V8.
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```text
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#if defined(__APPLE__) // 1
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_Lock: // 2
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#else // 3
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Lock: // 4
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#endif // 5
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START_PROC // 6
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1: ldaxr w1, [x0] // 7
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cbnz w1, 1b // lock taken - spin. // 8
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add w1, w1, 1 // 9
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stlxr w2, w1, [x0] // 10
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cbnz w2, 1b // shucks - somebody meddled. // 11
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// considered using dmb here // 12
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ret // 13
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END_PROC // 14
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#if defined(__APPLE__) // 1
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_Lock: // 2
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#else // 3
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Lock: // 4
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#endif // 5
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START_PROC // 6
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mov w3, 1 // 7
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1: ldaxr w1, [x0] // 8
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cbnz w1, 1b // lock taken - spin. // 9
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stlxr w2, w3, [x0] // 10
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cbnz w2, 1b // shucks - somebody meddled. // 11
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ret // 12
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END_PROC // 13
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```
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Once again, line 7 does a `ldaxr` dereferencing the lock itself (once
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again an `int32_t`) and marks the location of the lock as being
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hopefully, exclusive.
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Line 8 does a `ldaxr` dereferencing the lock itself (once again an
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`int32_t`) and marks the location of the lock as being hopefully,
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exclusive.
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Having gotten the value of the lock, on line 8, its value is inspected
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and if found to be non-zero, we branch back to attempting to get it
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@ -149,7 +148,7 @@ Unlock: // 4
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#endif // 5
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START_PROC // 6
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str wzr, [x0] // 7
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// considered using dmb here // 8
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dmb ish // 8
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ret // 9
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END_PROC // 10
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```
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@ -159,5 +158,11 @@ of the lock requires that no bad actor simply stomps on the lock by
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calling `Unlock` without first owning the lock. Just say no to lock
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stompers.
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Line 8 sets up a data memory barrier across each processor - it makes
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sure threads running on different cores see the update correctly. This
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code seemed to work without this line but intuition suggests it could
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be important. In `Lock()` the `stlxr` instruction has an implied data
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memory barrier.
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Please see the source code located [here](./spin_lock.S) for some
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additional comments regarding the implementation.
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Binary file not shown.
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@ -33,7 +33,6 @@ Lock:
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cbnz w1, 1b // lock taken - spin.
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stlxr w2, w3, [x0]
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cbnz w2, 1b // shucks - somebody meddled.
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// considered using dmb here
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ret
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END_PROC
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@ -44,7 +43,7 @@ Unlock:
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#endif
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START_PROC
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str wzr, [x0]
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// considered using dmb here
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dmb ish // ensure all cores are aware.
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ret
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END_PROC
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