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added two more instruction descriptions to the review chapter for bit fields
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@ -25,7 +25,7 @@ This performs a bitwise and of the `imm` value with the source register
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There are limits to the bit width of `imm` because it has to fit within
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the `and` instruction. If you exceed the allowable width of `imm`, the
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assembler will be glad to insult you.
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assembler will be glad to insult you.
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It is possible that a `mov`
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instruction will allow your immediate value. You'd follow up with an
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@ -72,9 +72,46 @@ conditional branch to follow the instruction.
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## `bfi`
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This instruction mnemonic stands for Bit Field Insert. The word *Insert* should
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really be copy. The official ARM [documentation](https://developer.arm.com/documentation/dui0801/g/A64-General-Instructions/BFI) explains this instruction
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very well so we'll repeat it here:
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*Bit Field Insert copies any number of low-order bits from a source register into the same number of adjacent bits at any position in the destination register, leaving other bits unchanged.*
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The instruction has the following format:
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```asm
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bfi rd, rs, lsb, width
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```
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Starting at bit 0 of `rs`, `width` bits are copied to `rd` starting at bit
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`lsb`.
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The `bfi` instruction replaces as many as three instructions: likely a shift,
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an `and` and an `orr`.
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## `mvn`
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This instruction takes only takes two operands (but permits an optional shift
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to be explained below).
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The basic syntax is:
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```asm
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mvn rd, rs
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```
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This flips all the bits in the source and copies them to the destination.
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In addition to the basic instruction, there is also:
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```asm
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mvn rd, rs, *shift* num_bits
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```
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The *shift* and `num_bits` function the same way as described above including
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the option to use `*shift*` as one of `lsl`, `lsr`, `asr` or `ror`.
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## `lsl`
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## `orr`
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