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will NOT be covering SVE
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@ -1,28 +0,0 @@
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#!/bin/bash
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file_list=`find . -print | grep -i ".md"`
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for element in $file_list
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do
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dir=`dirname ${element}`
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cd $dir
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md_name=`basename ${element} .md`
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pdf_name=${md_name}.pdf
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md_name=${md_name}.md
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if [ ! -f $pdf_name ]
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then
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echo Generating missing PDF file in $dir for $md_name
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pandoc $md_name -o $pdf_name
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cd - > /dev/null
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continue
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fi
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md_date=`date -r ${md_name} +%s`
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pdf_date=`date -r ${pdf_name} +%s`
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if [ $pdf_date -lt $md_date ];
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then
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#echo Is $pdf_date greater than $md_date
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echo Freshening $pdf_name in $dir
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pandoc $md_name -o $pdf_name
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fi
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cd - > /dev/null
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done
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@ -104,10 +104,12 @@ often used when executing SIMD instructions.
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SIMD is *Single Instruction - Multiple Data*. For example, 4 single
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SIMD is *Single Instruction - Multiple Data*. For example, 4 single
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precision floats might be multiplied by a scalar in a single
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precision floats might be multiplied by a scalar in a single
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instruction.
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instruction. The SIMD instruction set that is / will be covered in this
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book is called NEON.
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The AARCH64 ISA includes an even more exotic means of performing
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The AARCH64 ISA includes an even more exotic means of performing mass
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mass calculation which we might describe (some day).
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calculation called SVE. We will probably never cover AVE as no generally
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available processor implements it. This includes Apple Silicon.
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## Examples
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## Examples
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@ -71,7 +71,8 @@ The first kind is NEON.
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[This is described here.](./../../not_written_yet.md)
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[This is described here.](./../../not_written_yet.md)
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The second kind of Scalable Vector Extension (SVE) for which we do not
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The second kind of Scalable Vector Extension (SVE) for which we do not
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have near-term plans to cover.
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have near-term plans to cover. SVE is not implemented on any generally
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available ARM processor including Apple Silicon.
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## Demo Programs in this Chapter
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## Demo Programs in this Chapter
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@ -64,7 +64,7 @@ covered [in this chapter](./literals.md).
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## SIMD
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## SIMD
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`fmov` can also deal with the more complicated special cases induced by
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`fmov` can also deal with the more complicated special cases induced by
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SIMD instruction.
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SIMD instructions.
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## Movement To / From Integer Registers
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## Movement To / From Integer Registers
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